Tells the compiler to generate instructions for the highest instruction set available on the compilation host processor.
Windows: Code Generation > Intel Processor-Specific Optimization
Linux: Code Generation > Intel Processor-Specific Optimization
Mac OS X: Code Generation > Intel Processor-Specific Optimization
IA-32, Intel® 64 architectures
Linux and Mac OS X: | -xHost |
Windows: | /QxHost |
None
Windows* systems: None |
On Windows systems, if neither /Qx nor /arch is specified, the default is /arch:SSE2. On Linux systems, if neither -x nor -m is specified, the default is -msse2. |
This option tells the compiler to generate instructions for the highest instruction set available on the compilation host processor.
The instructions generated by this compiler option differ depending on the compilation host processor.
The following table describes the effects of specifying the -xHost (Linux* and Mac OS* X) or /QxHost (Windows*) option and it tells whether the resulting executable will run on processors different from the host processor.
Descriptions in the table refer to Intel® Advanced Vector Extensions (Intel® AVX), Intel® Streaming SIMD Extensions (Intel® SSE), and Intel® Supplemental Streaming SIMD Extensions (Intel® SSSE).
Instruction Set of Host Processor |
Effects When the -xHost or /QxHost Compiler Option is Specified |
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Intel® AVX2 |
When compiling on Intel® Processors: Corresponds to option -xCORE-AVX2 (Linux* and Mac OS* X) or /QxCORE-AVX2 (Windows*). The generated executable will not run on non-Intel processors and it will not run on Intel® processors that do not support Intel® AVX2 instructions. When compiling on non-Intel Processors: Corresponds to option -march=core-avx2 (Linux and Mac OS X) or /arch:CORE-AVX2 (Windows). The generated executable will run on Intel® processors and non-Intel processors that support at least Intel® AVX2 instructions. You may see a run-time error if the run-time processor does not support Intel® AVX2 instructions. |
Intel® AVX |
When compiling on Intel® Processors: Corresponds to option -xAVX (Linux* and Mac OS* X) or /QxAVX (Windows*). The generated executable will not run on non-Intel processors and it will not run on Intel® processors that do not support Intel® AVX instructions. When compiling on non-Intel Processors: Corresponds to option -mavx (Linux and Mac OS X) or /arch:AVX (Windows). The generated executable will run on Intel® processors and non-Intel processors that support at least Intel® AVX instructions. You may see a run-time error if the run-time processor does not support Intel® AVX instructions. |
Intel® SSE4.2 |
When compiling on Intel® Processors: Corresponds to option -xSSE4.2 (Linux* and Mac OS* X) or /QxSSE4.2 (Windows*). The generated executable will not run on non-Intel processors and it will not run on Intel® processors that do not support Intel® SSE4.2 instructions. When compiling on non-Intel Processors: Corresponds to option -msse4.2 (Linux and Mac OS X) or /arch:SSE4.2 (Windows). The generated executable will run on Intel® processors and non-Intel processors that support at least Intel® SSE4.2 instructions. You may see a run-time error if the run-time processor does not support Intel® SSE4.2 instructions. |
Intel® SSE4.1 |
When compiling on Intel® Processors: Corresponds to option -xSSE4.1 (Linux* and Mac OS* X) or /QxSSE4.1 (Windows*). The generated executable will not run on non-Intel processors and it will not run on Intel® processors that do not support Intel® SSE4.1 instructions. When compiling on non-Intel Processors: Corresponds to option -msse4.1 (Linux and Mac OS X) or /arch:SSE4.1 (Windows). The generated executable will run on Intel® processors and non-Intel processors that support at least Intel® SSE4.1 instructions. You may see a run-time error if the run-time processor does not support Intel® SSE4.1 instructions. |
Intel® SSSE3 |
When compiling on Intel® Processors: Corresponds to option -xSSSE3 (Linux* and Mac OS* X) or /QxSSSE3 (Windows*). The generated executable will not run on non-Intel processors and it will not run on Intel® processors that do not support Intel® SSSE3 instructions. When compiling on non-Intel Processors: Corresponds to option -mssse3 (Linux and Mac OS X) or /arch:SSSE3 (Windows). The generated executable will run on Intel® processors and non-Intel processors that support at least Intel® SSSE3 instructions. You may see a run-time error if the run-time processor does not support Intel® SSSE3 instructions. |
Intel® SSE3 |
When compiling on Intel® Processors: Corresponds to option -xSSE3 (Linux* and Mac OS* X) or /QxSSE3 (Windows*). The generated executable will not run on non-Intel processors and it will not run on Intel® processors that do not support Intel® SSE3 instructions. When compiling on non-Intel Processors: Corresponds to option -msse3 (Linux and Mac OS X) or /arch:SSE3 (Windows). The generated executable will run on Intel® processors and non-Intel processors that support at least Intel® SSE3 instructions. You may see a warning run-time error if the run-time processor does not support Intel® SSE3 instructions. |
Intel® SSE2 |
When compiling on Intel® Processors or non-Intel Processors: Corresponds to option -msse2 (Linux* and Mac OS* X) or /arch:SSE2 (Windows*). The generated executable will run on Intel® processors and non-Intel processors that support at least Intel® SSE2 instructions. You may see a run-time error if the run-time processor does not support Intel® SSE2 instructions. |
For more information on other settings for option -x (Linux* and Mac OS* X) and /Qx (Windows*), see that option description.
Optimization Notice |
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Intel’s compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice. Notice revision #20110804 |
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