x, Qx

Tells the compiler to generate optimized code specialized for the Intel processor that executes your program.

IDE Equivalent

Windows: Code Generation > Intel Processor-Specific Optimization

Linux: Code Generation > Intel Processor-Specific Optimization

Mac OS X: Code Generation > Intel Processor-Specific Optimization

Architectures

IA-32, Intel® 64 architectures

Syntax

Linux and Mac OS X:

-xcode

Windows:

/Qxcode

Arguments

code

Indicates the instructions and optimizations to be generated for the set of processors in each description. Many of the following descriptions refer to Intel® Streaming SIMD Extensions (Intel® SSE) and Supplemental Streaming SIMD Extensions (Intel® SSSE). Possible values are:

CORE-AVX2	May generate Intel® Advanced Vector Extensions 2 (Intel® AVX2), Intel® AVX, SSE4.2, SSE4.1, SSSE3, SSE3, SSE2, and SSE instructions for Intel® processors. Optimizes for a future Intel processor.
CORE-AVX-I	May generate Intel® Advanced Vector Extensions (Intel® AVX), including instructions in Intel® Core 2™ processors in process technology smaller than 32nm, Intel® SSE4.2, SSE4.1, SSSE3, SSE3, SSE2, and SSE instructions for Intel® processors. Optimizes for a future Intel processor.
AVX	May generate Intel® Advanced Vector Extensions (Intel® AVX), Intel® SSE4.2, SSE4.1, SSSE3, SSE3, SSE2, and SSE instructions for Intel® processors. Optimizes for a future Intel processor.
SSE4.2	May generate Intel® SSE4 Efficient Accelerated String and Text Processing instructions supported by Intel® Core™ i7 processors. May generate Intel® SSE4 Vectorizing Compiler and Media Accelerator, Intel® SSSE3, SSE3, SSE2, and SSE instructions and it may optimize for the Intel® Core™ processor family.
SSE4.1	May generate Intel® SSE4 Vectorizing Compiler and Media Accelerator instructions for Intel processors. May generate Intel® SSSE3, SSE3, SSE2, and SSE instructions and it may optimize for Intel® 45nm Hi-k next generation Intel® Core™ microarchitecture. This replaces value S, which is deprecated.
SSE3_ATOM	This option setting is deprecated. It has the same effect as specifying SSSE3_ATOM.
SSSE3_ATOM	May generate MOVBE instructions for Intel processors, depending on the setting of option -minstruction (Linux and Mac OS) or /Qinstruction (Windows). May also generate Intel® SSSE3, SSE3, SSE2, and SSE instructions for Intel processors. Optimizes for the Intel® Atom™ processor and Intel® Centrino® Atom™ Processor Technology.
SSSE3	May generate Intel® SSSE3, SSE3, SSE2, and SSE instructions for Intel processors. Optimizes for the Intel® Core™ microarchitecture. For Mac OS* X systems, this value is only supported on Intel® 64 architecture. This replaces value T, which is deprecated.
SSE3	May generate Intel® SSE3, SSE2, and SSE instructions for Intel processors. Optimizes for the enhanced Pentium® M processor microarchitecture and Intel NetBurst® microarchitecture. For Mac OS* X systems, this value is only supported on IA-32 architecture.This replaces value P, which is deprecated.
SSE2	May generate Intel® SSE2 and SSE instructions for Intel processors. Optimizes for the Intel NetBurst® microarchitecture. This value is not available on Mac OS* X systems. This replaces value N, which is deprecated.

You can also specify Host. For more information, see option -xHost (Linux* and Mac OS* X) or /QxHost (Windows*).

Default

Windows* systems: None
Linux* systems: None
Mac OS* X systems using IA-32 architecture: SSE3
Mac OS* X systems using Intel® 64 architecture: SSSE3

On Windows systems, if neither /Qx nor /arch is specified, the default is /arch:SSE2.

On Linux systems, if neither -x nor -m is specified, the default is -msse2.

Description

This option tells the compiler to generate optimized code specialized for the Intel processor that executes your program. It also enables optimizations in addition to Intel processor-specific optimizations. The specialized code generated by this option may run only on a subset of Intel processors.

The resulting executables from these processor-specific options can only be run on the specified or later Intel® processors, as they incorporate optimizations specific to those processors and use a specific version of the Intel® Streaming SIMD Extensions (Intel® SSE) instruction set.

The binaries produced by these code values will run on Intel processors that support all of the features for the targeted processor.

Do not use code values to create binaries that will execute on a processor that is not compatible with the targeted processor. The resulting program may fail with an illegal instruction exception or display other unexpected behavior.

Compiling the function main() with any of the code values produces binaries that display a fatal run-time error if they are executed on unsupported processors, including all non-Intel processors. .

Compiler options m and arch produce binaries that should run on processors not made by Intel that implement the same capabilities as the corresponding Intel processors.

Previous value O is deprecated and has been replaced by option -msse3 (Linux and Mac OS X) and option /arch:SSE3 (Windows).

Previous values W and K are deprecated. The details on replacements are as follows:

Mac OS X systems: On these systems, there is no exact replacement for W or K. You can upgrade to the default option -msse3 (IA-32 architecture) or option -mssse3 (Intel® 64 architecture).
Windows and Linux systems: The replacement for W is -msse2 (Linux) or /arch:SSE2 (Windows). There is no exact replacement for K. However, on Windows systems, /QxK is interpreted as /arch:IA32; on Linux systems, -xK is interpreted as -mia32. You can also do one of the following:
- Upgrade to option -msse2 (Linux) or option /arch:SSE2 (Windows). This will produce one code path that is specialized for Intel® SSE2. It will not run on earlier processors
- Specify the two option combination -mia32 -axSSE2 (Linux) or /arch:IA32 /QaxSSE2 (Windows). This combination will produce an executable that runs on any processor with IA-32 architecture but with an additional specialized Intel® SSE2 code path.

The -x and /Qx options enable additional optimizations not enabled with options -m or /arch (nor with options –ax and /Qax).

On Windows* systems, options /Qx and /arch are mutually exclusive. If both are specified, the compiler uses the last one specified and generates a warning. Similarly, on Linux* and Mac OS* X systems, options -x and -m are mutually exclusive. If both are specified, the compiler uses the last one specified and generates a warning.

Optimization Notice
Intel’s compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice. Notice revision #20110804

Optimization Notice

Intel’s compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804

Alternate Options

None