mkl_enable_instructions

Syntax

FORTRAN:

irc = mkl_enable_instructions(MKL_AVX_ENABLE)

C:

irc = mkl_enable_instructions(MKL_AVX_ENABLE);

Include Files

FORTRAN 77: mkl_service.fi
C: mkl_service.h

Input Parameters

MKL_AVX_ENABLE

Parameter indicating which new instructions the user needs to enable.

Output Parameters

Name	Type	Description
irc	FORTRAN: INTEGER*4 C: int	Value reflecting AVX usage status: =1 MKL uses the AVX code, if the hardware supports Intel® AVX. =0 The request is rejected. Most likely, mkl_enable_instructions has been called after another Intel MKL function.

Name

Type

Description

irc

FORTRAN: INTEGER*4

C: int

Value reflecting AVX usage status:

=1: MKL uses the AVX code, if the hardware supports Intel® AVX.
=0: The request is rejected. Most likely, mkl_enable_instructions has been called after another Intel MKL function.

Description

This function is currently void and deprecated but can be used in future Intel MKL releases.

Note

Always remember to add #include "mkl.h" to use the C usage syntax.

Optimization Notice
Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice. Notice revision #20110804

Optimization Notice

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804