The prototypes for Intel® Streaming SIMD Extensions (Intel® SSE) intrinsics for set operations are in the xmmintrin.h header file.
The results of each intrinsic operation are placed in registers. The information about what is placed in each register appears in the tables below, in the detailed explanation of each intrinsic. R0, R1, R2 and R3 represent the registers in which results are placed.
Intrinsic Name |
Operation |
Corresponding |
---|---|---|
_mm_set_ss |
Set the low value and clear the three high values |
Composite |
_mm_set1_ps |
Set all four words with the same value |
Composite |
_mm_set_ps |
Set four values, address aligned |
Composite |
_mm_setr_ps |
Set four values, in reverse order |
Composite |
_mm_setzero_ps |
Clear all four values |
Composite |
__m128 _mm_set_ss(float w )
Sets the low word of an SP FP value to w and clears the upper three words.
R0 |
R1 |
R2 |
R3 |
---|---|---|---|
w |
0.0 |
0.0 |
0.0 |
R0 |
R1 |
R2 |
R3 |
---|---|---|---|
w |
w |
w |
w |
__m128 _mm_set_ps(float z, float y, float x, float w )
Sets the four SP FP values to the four inputs.
R0 |
R1 |
R2 |
R3 |
---|---|---|---|
w |
x |
y |
z |
__m128 _mm_setr_ps (float z, float y, float x, float w )
Sets the four SP FP values to the four inputs in reverse order.
R0 |
R1 |
R2 |
R3 |
---|---|---|---|
z |
y |
x |
w |
__m128 _mm_setzero_ps (void)
Clears the four SP FP values.
R0 |
R1 |
R2 |
R3 |
---|---|---|---|
0.0 |
0.0 |
0.0 |
0.0 |
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