The Intel® Streaming SIMD Extensions 2 (Intel® SSE2) intrinsics for integer move operations are listed in this topic. The prototypes for the Intel® SSE2 intrinsics are in the emmintrin.h header file.
The results of each intrinsic operation are placed in registers. The information about what is placed in each register appears in the tables below, in the detailed explanation of each intrinsic. R, R0, R1, R2 and R3 represent the registers in which results are placed.
Intrinsic Name |
Operation |
Corresponding Intel® SSE2 Instruction |
---|---|---|
_mm_cvtsi32_si128 |
Move and zero |
MOVD |
_mm_cvtsi64_si128 |
Move and zero |
MOVQ |
_mm_cvtsi128_si32 |
Move lowest 32 bits |
MOVD |
_mm_cvtsi128_si64 |
Move lowest 64 bits |
MOVQ |
__m128i _mm_cvtsi32_si128(int a)
Moves 32-bit integer a to the least significant 32 bits of an __m128i object. Zeroes the upper 96 bits of the __m128i object.
R0 |
R1 |
R2 |
R3 |
---|---|---|---|
a |
0x0 |
0x0 |
0x0 |
__m128i _mm_cvtsi64_si128(__int64 a)
Moves 64-bit integer a to the lower 64 bits of an __m128i object, zeroing the upper bits.
R0 |
R1 |
---|---|
a |
0x0 |
R |
---|
a0 |
R |
---|
a0 |
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