Performs a packed bit test of two 256-bit or 128-bit float32 vectors to set the CF flag. The corresponding Intel® AVX instruction is VTESTPS.
Syntax
extern __m256 _mm256_testc_ps(__m256 s1, __m256 s2); |
extern __m128 _mm_testc_ps(__m128 s1, __m128 s2); |
Arguments
s1 |
first source float32 vector |
s2 |
second source float32 vector |
Description
Allows setting of the CF flag. The CF flag is set based on the result of a bitwise AND and logical NOT operation between the first and second source vectors. The corresponding instruction, VTESTPS, sets the CF flag if all the resulting bits are 0. If the resulting bits are non-zeros, the instruction clears the CF flag.
The _mm_testc_ps intrinsic sets the CF flag according to results of the 128-bit float32 source vectors. The _m256_testc_ps intrinsic sets the CF flag according to the results of the 256-bit float32 source vectors.
Note
Intel® AVX instructions include a full compliment of 128-bit SIMD instructions. Such Intel® AVX instructions, with vector length of 128-bits, zeroes the upper 128 bits of the YMM register. The lower 128 bits of the YMM register is aliased to the corresponding SIMD XMM register.
Returns
Non-zero if CF flag is set
Zero if the CF flag is not set